Freescale-semiconductor StarCore SC140 Manuel d'utilisateur télécharger pdf (Page 171)

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Event Selector (ES) Registers

SC140 DSP Core Reference Manual 4-61

4.9.2.2 EDCD Reference Value Register (EDCD_REF)

EDCD_REF is a 32-bit register used to hold a reference value to be compared by the EDCD comparator.

EDCD_REF is used by the EDCD comparator. If a byte (8 bits) or a word (16 bits) is to be written into the

EDCD_REF, it should be LSB-aligned.

4.9.2.3 EDCD Mask Register (EDCD_MASK)

EDCD_MASK is a 32-bit register that allows the masking of any of the bits in the data bus value that is

compared. If bit i in the EDCD_MASK is zero, then it does not participates in the comparison. The data on

the bus is ANDed with the EDCD_MASK value, and is then compared with the EDCD_REF register

according to the access width. Hence the masked bits must also be zero in the EDCD_REF.

In case that the reference value is 16 or 8 bits long, the mask value must be duplicated 2 or 4 times

(respectively) to fill the mask register.

Since data buses are 64 bits, the 32-bit EDCD_MASK register is masked on both 32 LSB and 32 MSB bits

of the sampled bus value.

EDCD_MASK is initialized to all ones at reset.

4.10 Event Selector (ES) Registers

ES selects the source for various operations used by the EOnCE. It contains the following registers:

• Event selector control register (ESEL_CTRL)

• Event selector mask debug state register (ESEL_DM)

• Event selector mask debug exception register (ESEL_DI)

• Event selector mask enable trace register (ESEL_ETB)

• Event selector mask disable trace register (ESEL_DTB)

The following sections describe these registers.

4.10.1 Event Selector Control Register (ESEL_CTRL)

The 8-bit control register ESEL_CTRL controls the operation of the ES, which is programmed in the

following order:

1. Reset the event selector mask registers.

2. Program the ESEL_CTRL register.

3. Program the appropriate event selector mask registers.

1 2 ... 166 167 168 169 170 171 172 173 174 175 176 ... 759 760

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